This invention relates to analog inverters and, more particularly, to such inverters for use in charge transfer apparatus.
In an analog delay line filter, as shown in FIG. 1, an input signal is passed through a delay line, and the output of the delay line is fed back to the input of the delay line through an analog inverter, the output of which is the complement of its input. That is, if the input voltage V of the analog inverter is given by EQU V = A + B(t) (1)
where A is some DC level and B(t) is the time varying portion of the input, then the output V' of the inverter is given by EQU V' = A' - B(t) (2)
where A' is another DC level which may or may not be related to level A. The inverted signal is combined with the input in a summing arrangement, the sum constituting the input to the delay line. The arrangement as a whole operates as a bankpass filter having a frequency response of the type depicted in FIG. 2.
Illustratively, the delay line is a charge transfer device (CTD) in the form of a dynamic shift register. The CTD in turn may be either a charge coupled device (CCD) of the type described in copending application Ser. No. 196,933 (Boyle 19-26), filed on Nov. 9, 1971, now U.S. Pat. No. 3,858,232, a C4D of the type described in copending application Ser. No. 262,787 (Krambeck 10-28-8) filed on June 14, 1972, or a bucket brigade (BB) device of the type described in U.S. Pat. No. 3,660,697 (Berglund 6-8) issued on May 2, 1972. The use of a BB device as an analog delay line is described in an article by L. Boonstra et al. in Electronics, Vol. 45, pages 64-71 (Feb. 28, 1972). Advantageously, therefore, if both the analog inverter and the delay line of the aforementioned bandpass filter are CCD or BB devices, the manufacture of the filter would be simplified, e.g., both the delay line and the inverter could be fabricated on a single chip by well-known integrated circuit technology. Moreover, interface problems, such as impedance matching and loading due to stray capacitance, would be alleviated.